en.Wedoany.com Reported - At the 2026 World Artificial Intelligence Conference (WAIC), T-Head, the chip company under China's Alibaba Group, announced the open-sourcing of its self-developed AI software stack, T-Head SAIL. This is the underlying software for its Zhenwu series of AI chips, featuring independent intellectual property rights and full compatibility with mainstream AI ecosystems, covering the complete chain from the operating system layer, software development kit layer, to the interface layer. The source code, drivers, toolchains, and documentation are all available for download on the T-Head developer community.
Prior to open-sourcing, this software stack had already accumulated a certain application base. As of April 2026, cumulative shipments of Zhenwu AI chips reached 560,000 units, serving over 400 customers across more than 20 industries. Additionally, the software stack has been validated in production environments at Alibaba Cloud and various industry enterprises, including handling massive traffic surges during Double 11 and meeting strict service level agreement requirements in complex scenarios.
An AI software stack is a critical bridge between chips and developers. Developers write code using frameworks like PyTorch and TensorFlow, which cannot directly operate the underlying circuits; the software stack is needed for instruction translation and task scheduling. In the past, chip manufacturers often delivered pre-compiled binary toolchains, making it difficult for developers to understand internal implementations. When encountering performance issues, developers had to wait for vendor responses, and model migration cycles often took weeks. This context explains why NVIDIA has long maintained an advantage in the AI computing market with its CUDA ecosystem. T-Head's SAIL plays a role similar to CUDA for NVIDIA. This open-sourcing aims to transform the previously closed underlying capabilities into a transparent and controllable "white box," allowing research teams and developers to access and deeply customize the underlying capabilities.
The open-sourced SAIL is a five-layer technology stack validated in production environments, ranging from underlying drivers and runtime to upper-level development tools. The driver and runtime layer includes PPU Runtime, user-mode drivers, and kernel-mode drivers, responsible for device management and memory management between the chip and the operating system. The programming language layer offers C/C++ and Python interfaces, enabling developers to achieve smooth code migration without learning new languages. The compiler layer includes Compiler and Debugger components, supporting end-to-end compilation optimization, allowing developers to view intermediate representations to understand the optimization process. The high-performance library layer is the thickest part of the technology stack, containing mathematical and AI computing libraries such as acBLAS, acFFT, acRAND, acSPARSE, acDNN, and acSOLVER; codec libraries like HGENC, HGDEC, and HGJPEG; collective communication libraries such as PCCL and sailSHMEM; and extension libraries like acext and HGML. The topmost development tools layer includes Asight Compute for operator-level performance analysis, Asight Systems for system-level full-stack analysis, PPU-SMI for device monitoring and management, and PPU-DCGM for supporting cluster resource scheduling.
To reduce migration costs for developers, SAIL offers three key features. First, no code rewriting is required; its operator library is highly compatible with mainstream programming models, allowing developers to directly reuse existing code. Second, no waiting for adaptation is needed; T-Head's self-developed inference engine provides out-of-the-box performance, with an average adaptation time of less than 7 days for mainstream AI inference frameworks, enabling developers to quickly use the latest operators and optimizations. Finally, no binding to a specific framework or platform is required; SAIL has been adapted to over 260 mainstream training and inference frameworks, including PyTorch, TensorFlow, vLLM, and SGLang. Toolchains can be selected as needed without being tied to a specific technical path.
Since its establishment in 2018, T-Head has continuously pursued hardware deployment. In 2019, it launched the Hanguang 800 chip for AI inference, achieving an inference performance of 78,563 IPS and leading energy efficiency among comparable chips. In 2021, it introduced the Yitian 710 general-purpose server CPU, with performance exceeding industry benchmarks by 20% and energy efficiency improved by over 50%. The Zhenwu 810 adopts a parallel computing architecture and chip-to-chip interconnect technology, equipped with 96GB of HBM2e memory and 700GB/s chip-to-chip interconnect bandwidth, with a power consumption of 400W. In 2026, the new generation training-inference integrated AI chip, Zhenwu M890, was released, featuring 144GB of onboard memory, chip-to-chip interconnect bandwidth increased to 800GB/s, overall performance three times that of the Zhenwu 810E, native support for FP32 high-precision training to FP4 low-precision inference, and full-bandwidth interconnection of 64 cards using the self-developed ICN Switch 1.0 chip.
In the data center domain, T-Head has achieved a self-developed layout of a "triple package" comprising computing power, networking power, and storage power, including the Zhenwu series of AI chips and the Yitian series of server CPUs, the ICN Switch interconnect chip and the Panmai series of smart network interface cards, and the Zhenyue series of storage controller chips. The name SAIL stands for Seed of AI Library. T-Head stated that it views every line of open-source code as a seed, aiming to promote the co-development of the domestic AI ecosystem.
