Japan's Rapidus Prices 2nm Wafers at Around $20,000 in 2027, Undercutting TSMC
2026-07-11 11:51
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en.Wedoany.com Reported - Japan's chip manufacturer Rapidus, led by CEO Atsuyoshi Koike, announced plans to attract customers away from TSMC by offering differentiated services and lower manufacturing prices. Rapidus's pricing strategy is challenging, as it is developing leading-edge process technology.

Logo of Japanese semiconductor manufacturer Rapidus, covering the exterior of its semiconductor fabrication plant in the snow

Currently, Rapidus plans to charge between 3 million and 3.5 million yen (approximately $18,550 to $21,635) per wafer processed using its 2-nanometer-class manufacturing process. This price is significantly lower than TSMC's reportedly estimated $30,000 per N2 wafer and is comparable to Samsung's $20,000 per wafer for its SF2 manufacturing technology. The final price will depend on exchange rates, but Rapidus's intention to undercut TSMC is clear.

Rapidus plans to begin mass production using its 2-nanometer-class manufacturing technology in the second half of 2027. Ramping up capacity at the new fab will take time, so meaningful output is not expected until 2028. By then, TSMC's N2 will no longer be its leading node. By the time Rapidus starts mass production at its IIM-1 fab in 2027, TSMC will already be mass-producing chips using its performance-enhanced N2P manufacturing node and will have completed all yield learning related to Gate-All-Around (GAA) across five fab modules. By 2028, when Rapidus achieves meaningful output at IIM-1, TSMC will be ramping production on its advanced A16 manufacturing process (featuring Super Power Rail backside power delivery) and its third-generation 2-nanometer-class node, named N2X.

Beyond differences in production scale and process maturity, one of TSMC's key advantages over competitors is its Open Innovation Platform (OIP) ecosystem. This ecosystem includes comprehensive electronic design automation tools, silicon-verified IP (even covering the latest nodes), a large pool of contract chip designers, and advanced packaging services from TSMC and its partners. Currently, Rapidus, Intel, and Samsung Foundry cannot offer services close to the level of TSMC's OIP. Given the barriers TSMC may establish by 2028 with its 2-nanometer-class manufacturing technology, lower pricing is one of the few ways to compete with the world's largest foundry.

Rapidus operates only one fab, and competing with lower prices is not the most profitable strategy—it may even be a loss-leading one. However, the company may have another ace up its sleeve: single-wafer processing for all process steps. This approach will significantly shorten production cycle times, becoming an advantage over other chip manufacturers, at the cost of lower tool utilization efficiency. Whether lower prices and shorter cycle times will be enough to help Rapidus win customers from TSMC remains to be seen.

Rapidus is reportedly in talks with over 60 potential customers, primarily overseas companies. This indicates its commitment to becoming a strong competitor to global leader TSMC and contract chip manufacturers Intel Foundry and Samsung Foundry.

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