Rapidus Proposes Concept for a Lunar Semiconductor Plant by 2040

en.Wedoany.com Reported - On September 10, Atsuyoshi Koike, Representative Director, President and CEO of Japanese advanced semiconductor company Rapidus, said at a U.S.-Japan semiconductor and AI cooperation event held at the Hudson Institute, a Washington think tank, that the company is envisioning building a semiconductor plant on the lunar surface around 2040. Koike said the concept is "not a joke," and mentioned that lunar water resources could serve as one of the resource conditions for future semiconductor manufacturing. A concept video of a lunar semiconductor plant produced by artificial intelligence was also shown at the event. The Hudson Institute confirmed that Koike, IBM CEO Arvind Krishna, and officials from Japan's Ministry of Economy, Trade and Industry attended the day's event.

At the same event, IBM CEO Arvind Krishna said that in addition to advancing 2-nanometer-class advanced semiconductor cooperation, IBM and Rapidus are also conducting 1-nanometer-class semiconductor R&D cooperation. The Hudson Institute's introduction to the event shows that the core industrial cooperation between Rapidus and IBM at this stage remains the 2-nanometer advanced chip project in Hokkaido; Rapidus official materials show that its Chitose IIM manufacturing base in Hokkaido is positioned for 2-nanometer and more advanced logic semiconductors, with plans to enter mass production in 2027.

In fiscal 2026, Rapidus will continue to advance the development of 2-nanometer logic semiconductor mass production technology, including the PDK required for customer chip design, a short-turnaround-time production system, and the introduction and validation of automated transport and production management systems on the pilot line, while also advancing R&D related to defect density and yield. In back-end manufacturing, the company is developing 2.xD and 3D packaging as well as chiplet design, manufacturing, and testing technologies for 2-nanometer-class semiconductors on its RCS pilot line.

IBM announced in June this year a 0.7-nanometer-class research chip technology, which uses a new three-dimensional Nanostack transistor architecture and can integrate nearly 100 billion transistors on a single fingernail-sized chip. IBM said at the time that the technology was still in the R&D stage and did not announce a mass production manufacturing partner, so the lunar plant concept proposed by Koike this time belongs to a different time scale and implementation stage from Rapidus's current 2-nanometer mass production plan in Hokkaido.