en.Wedoany.com Reported - Intel has partnered with SambaNova and Foxconn to unveil a rack-scale architecture designed for inference and agentic AI workloads at the 2026 Taipei International Computer Show. The platform integrates Intel Xeon processors, SambaNova's SN-50 Reconfigurable Dataflow Unit (RDU), and Foxconn's system integration capabilities, targeting production-ready AI racks for hyperscale data centers, enterprises, and emerging AI factories. This move underscores Intel's push to position CPUs as core components for large-scale AI deployments, catering to the market trend where inference demand is gradually surpassing model training.
The architecture reflects the industry's evolution from training-centric to inference-centric infrastructure. In training scenarios, typically one CPU supports four GPUs, but as agentic workloads scale, the ratio of CPUs to accelerators approaches 1:1. The rack design prioritizes performance per watt and performance per dollar over maximizing training throughput. Intel notes that agentic AI places higher demands on CPU orchestration, scheduling, memory management, data movement, and execution of non-matrix workloads.
Intel showcased a fully disaggregated inference architecture through Vector Core Compute, a platform backed by Vista Equity Partners and Cambium Capital, positioned as an enterprise-grade dedicated inference cloud. In a demonstration running the MiniMax 2.5 model, workloads were dynamically split across different silicon architectures to optimize each stage of the AI pipeline: orchestration and execution were handled by Intel Xeon 6 processors, decoding by SambaNova SN40 RDUs, and prefill operations by NVIDIA Blackwell GPUs. This deployment is considered one of the first production-grade inference pipelines to distribute workloads across different processor types. Together.ai has signed on as the first commercial customer.
Key announcements include: Intel, SambaNova, and Foxconn collaborating to deliver rack-scale infrastructure for inference and agentic AI deployments; Foxconn handling end-to-end system integration, manufacturing, and deployment, with plans to launch high-density CPU variants to optimize costs for inference, data processing, and hybrid AI; Intel releasing the Xeon 6+ processor (formerly codenamed Clearwater Forest), built on Intel's 18A process node, marking the first deployment of this process in data centers. A single liquid-cooled rack can support up to 36,864 Xeon 6+ cores, designed to maximize AI agent concurrency within a power envelope of approximately 100 kW.
Intel CEO Lip-Bu Tan stated that with the rise of inference, agentic, and physical AI, Intel is committed to innovation from chips to systems. The focus of this announcement is Intel's attempt to define a complete AI rack architecture. NVIDIA has expanded into full-stack AI infrastructure through DGX, NVL72, and AI factory designs; Intel is adopting a similar strategy, positioning Xeon as the orchestration layer for AI inference while collaborating with specialized accelerator vendors. The partnership with SambaNova provides Intel with a mature inference accelerator architecture without waiting for internal alternatives. As spending shifts from training to production-grade AI deployments, power consumption, utilization, latency, and total cost of ownership become key metrics. Intel's emphasis on CPU density, rack-scale integration, and disaggregated inference aims to capture market opportunities in AI factories that do not require massive training GPUs but still need large-scale orchestration and inference capabilities.
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