en.Wedoany.com Reported - Qualcomm Technologies recently unveiled a data center roadmap centered on AI inference at its Investor Day, encompassing the Qualcomm Dragonfly C1000 CPU, High Bandwidth Compute (HBC) memory architecture, Dragonfly AI300 inference accelerator, advanced interconnect products, and custom silicon solutions. The company also announced a strategic multi-generational agreement with Meta, which plans to deploy Qualcomm Dragonfly C1000 CPUs in its future server infrastructure starting in the second half of 2028.
These initiatives mark Qualcomm's most significant expansion in the data center infrastructure space. Unlike focusing solely on AI accelerators, Qualcomm has proposed a full-stack strategy covering CPUs, AI inference processors, memory technology, optical interconnects, and custom silicon. The company stated that the roadmap targets the rapidly growing AI inference market, with agentic AI workloads expected to drive substantial growth in token generation and memory bandwidth demands. Qualcomm believes that performance per watt and tokens per watt will become key metrics for measuring AI infrastructure economics.
The Dragonfly portfolio integrates Qualcomm's technologies from mobile, PC, networking, and communications businesses. The company noted that it has shipped over 40 billion components globally and possesses decades of experience in low-power system-on-chip design, advanced interconnects, memory architecture, and custom processor development. More than 35 ecosystem partners currently support the initiative, including Arista, Astera Labs, Cirrascale, Foxconn, Lenovo, Micron, Quanta, Samsung SDS, SK hynix, Supermicro, VAST Data, Viettel IDC, VNPT Group, Wistron, Inventec, Gigabyte, Core42, HUMAIN, and IONOS.
The Dragonfly C1000 CPU features a custom Qualcomm Oryon CPU architecture based on a chiplet design, incorporating over 250 CPU cores with a target frequency exceeding 5 GHz. Designed for agentic AI orchestration, general-purpose cloud computing, and AI head node workloads, it supports PCIe Gen 7 (over 2 TBps), CXL memory expansion, and memory disaggregation, with advanced RAS capabilities. Optimized for high infrastructure utilization and performance per TCO, it supports both air-cooled and liquid-cooled deployments and is compatible with OCP ORv3 racks and servers, with commercial availability expected in 2028.
High Bandwidth Compute (HBC) is a near-memory computing architecture designed for AI workloads, utilizing advanced 3D stacked silicon integration technology to address AI memory bandwidth and data movement bottlenecks. HBC Gen 1 delivers up to 133 TBps of effective memory bandwidth per AI250 card, an 18x improvement over the AI200 using LPDDR5X memory; HBC Gen 2 targets a 54x improvement over the AI200. Qualcomm claims its bandwidth per watt is 6x higher than HBM-based alternatives, improving AI inference economics and energy efficiency while supporting larger AI models and more responsive agentic AI deployments.
The Dragonfly AI300 accelerator is a third-generation AI inference accelerator platform integrating HBC Gen 2 technology. It supports both air-cooled and direct liquid-cooled deployments and is optimized for LLM, multimodal AI, inference engines, and agentic AI workloads, enabling high-throughput, low-latency inference. It supports vertical scaling via UALink and ESUN, and horizontal scaling via Ethernet, optical fiber, and copper interconnects, making it suitable for disaggregated AI inference architectures, with commercial sampling expected in 2028.
The custom silicon program offers end-to-end silicon, software, and system co-design services, utilizing advanced packaging and modular architectures optimized for performance, power efficiency, and deployment requirements, supporting agentic AI and dedicated hyperscale workloads. Qualcomm leverages its supply chain ecosystem for large-scale manufacturing execution, accelerating time-to-market and reducing customer development risks. The interconnect portfolio includes die-to-die interconnect technologies, copper and optical network solutions supporting 800G and 1.6T network links, as well as active optical cables (AOC) and active electrical cables (AEC). Campus-scale optical interconnects extend up to 20 kilometers, utilizing Qualcomm SerDes technology, PAM4 signaling, and coherent simplified DSP technology, aimed at addressing data movement bottlenecks in distributed AI infrastructure.
The multi-generational agreement with Meta marks the first publicly disclosed hyperscale deployment project for the Dragonfly CPU roadmap. The Dragonfly C1000 has been selected for Meta's future server deployments, with production deployment planned to begin in the second half of 2028, supporting Meta's future AI infrastructure expansion.
Qualcomm President and CEO Cristiano Amon stated that the company designed its data center CPU to deliver leading single-core performance and breakthrough energy efficiency for large-scale deployments, and the multi-generational agreement with Meta is a significant endorsement of this direction. He noted that Qualcomm's collaboration with Meta is expanding from devices to the data center level, and this is just the beginning.
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