en.Wedoany.com Reported - Zhang Chenguang, CEO of First Microelectronics (Changzhou) Co., Ltd., delivered a speech at the 2026 Automotive Ecosystem Innovation Conference, sharing the company's practices and insights in the field of high-speed wired transmission in the AI era. Zhang noted that First Microelectronics is committed to building a technology platform spanning from automotive SerDes to high-speed interconnection in data centers, thereby supporting the development of intelligent mobility and AI infrastructure.

Zhang reviewed the company's development history. Founded in 2020, First Microelectronics experienced the automotive-grade chip boom from 2021 to 2023 and is now one of only two domestic manufacturers with mass production capabilities for automotive SerDes chips, having shipped over one million units cumulatively. Its R&D teams are based in Shanghai, China; Dallas, USA; and the Netherlands. In the automotive SerDes field, 80% to 90% of the market share is still held by two international giants, TI and ADI, with very few domestic manufacturers capable of mass production. Automotive applications impose extremely high requirements on SerDes technology: ordinary vehicles require stable connections over 10 meters, commercial models can exceed 30 meters, while maintaining signal integrity at rates of 2 to 16 Gbps and operating in temperature ranges from -40°C to 105°C. At frequencies above 2 GHz, channel loss degrades exponentially with frequency, and high or low temperatures further exacerbate signal attenuation—a core challenge in high-frequency analog circuit design. First Microelectronics' products already cover the main automotive rate segments and achieve interoperability with ADI's OpenGMSL protocol.

Regarding technical pathways, Zhang pointed out that pure analog architectures offer advantages in power consumption and area at rates of 10 Gbps and below. First Microelectronics is one of the very few manufacturers globally to adopt this architecture and achieve large-scale production. Most domestic manufacturers use digital structures or traditional Ethernet/PCIe architectures, which rely on advanced process nodes. For ultra-high-speed SerDes at 224 Gbps and above in data centers, regardless of architecture, dependence on 3nm or 4nm advanced processes is unavoidable. Copper-based SerDes and the electrical interface side of optical modules are essentially the same technology: 112G PAM4 corresponds to a 56 GBaud rate, and 224G corresponds to 112 GBaud. The greatest challenge in short-distance transmission is extremely high insertion loss. From a physical layer perspective, copper transmission has clear bottlenecks: at high frequencies, the skin effect concentrates current on the conductor surface. At 224G@56GHz, the skin depth is only about 0.28 micrometers, requiring HVLP3-grade ultra-smooth copper foil. Dielectric loss is also non-negligible, as high-frequency alternating electric fields excite molecular vibrations in the dielectric, converting energy into heat. When rates further increase to the 448G level, copper lines will adopt new process routes such as thin-film technology. The ultimate direction for ultra-high-speed transmission in data centers is photoelectric integration. In the evolution from 800 Gbps to 1.6 Tbps and 3.2 Tbps, short-distance copper interconnection and optical transmission will coexist for the long term.

Addressing market hotspots, Zhang offered a sober assessment. He noted that optical module-related companies have high market capitalizations but generally relatively limited sales revenue, reflecting strong market expectations for the AI transmission track. The scarcest resources in the chip industry are advanced process capacity (such as 3nm and 4nm) and memory capacity, with limited domestic production capabilities—these are strategic reserve resources. He advised companies to evaluate two core issues: long-term technology accumulation and stable capacity assurance. First Microelectronics has established a comprehensive supply chain system, partnering with global leaders to secure capacity. In terms of technical comparison, he analyzed Broadcom's 224G SerDes as an example: its architecture includes an analog front-end CTLE, SAR ADC array, and digital back-end DSP. The core difficulty lies in the need for ultra-high-speed ADCs at 56G rates to achieve hundred-gigabit-level sampling via time-interleaving technology while maintaining low power consumption. Zhang pointed out that Broadcom's true barrier is not just architectural design but also its years of accumulated custom digital synthesis libraries and system-level IP, enabling 30% to 40% lower power consumption than second-tier competitors under the same process conditions. Through architectural design optimization, First Microelectronics achieves the lowest power consumption and smallest area in the domestic industry at equivalent rates, creating a differentiated competitive advantage.

Starting from automotive SerDes, First Microelectronics has built a matrix of over 15 chips covering 2 to 16 Gbps, leveraging six core technologies: high-speed analog front-end, PAM4 long-distance algorithms, automotive-grade anti-interference, low-power architecture, automotive-grade reliability, and transferable IP stacks. The company holds 13 invention patents and 42 patents pending. Its next step is to extend the same technology stack to short-distance robot interconnection and high-speed data center transmission scenarios, aiming to become a leading communications company in the AI transmission field.