en.Wedoany.com Reported - Against the backdrop of persistently tight DRAM supply, PSRAM, with its lower standby power consumption and relatively relaxed supply pressure, is becoming a transitional storage solution for some mid-to-low-end visual terminal manufacturers. However, the industry generally believes that its bandwidth ceiling is only suitable for 1080P and below resolutions, and 4K high-frame-rate devices still rely on DRAM.
Compared to DRAM, PSRAM offers similar basic read and write performance and can handle tasks such as 1080P image caching and on-device AI model computation. The system design does not require external DRAM chips, which can alleviate material procurement pressure for manufacturers to some extent and reduce BOM costs. At the same time, PSRAM's ultra-low standby power consumption, combined with a low-power main control architecture, makes it suitable for wireless battery-powered terminals such as smart locks and battery-powered IPC, helping to extend device battery life.
Currently, terminal products such as civilian security, smart home, and two-wheeler dashboards mostly adopt 1080P imaging specifications. PSRAM's bandwidth just meets the requirements of this image quality, and hardware modifications do not require significant design adjustments. The difficulty of PCB routing and packaging processing is lower than that of DRAM solutions. However, traditional PSRAM solutions still have several shortcomings: first, the interface rate is generally only 250MHz, and the bandwidth can only support 1080P images. Expanding capacity by paralleling multiple chips leads to complex routing, increased packaging costs, and power consumption issues, making it unable to cover 4K high-frame-rate or industrial vision scenarios; second, PSRAM shares wafer production lines with DRAM, and manufacturers prioritize capacity allocation for high-margin HBM and server DRAM, diluting PSRAM's cost advantage; third, the industry believes that a hybrid storage architecture combining DRAM and PSRAM will be the mainstream direction for main control chips, potentially shrinking the application space of pure PSRAM solutions.
Beken Corporation's latest BK7259 on-device AI SoC adopts a design different from the industry's single-PSRAM solution. The chip integrates two 16-line PSRAM chips internally, supporting a 400MHz interface rate, with a dual-channel parallel theoretical throughput of 3.2GByte/S. Even considering efficiency losses, its effective throughput is comparable to 16bit DDR2. This dual-channel design enables the BK7259 to support a 2560x1440 resolution (4 million pixel) video link, natively adapt to 4 million pixel cameras, or achieve simultaneous display of a 1080P camera and a 1080P screen.
Through SiP packaging technology, the BK7259 integrates high-capacity Flash, dual PSRAM chips, Wi-Fi 6, BLE 5.4, Thread multi-protocol wireless, power management, and multi-channel audio Codec into a single chip. The peripheral circuit requires only one crystal and a few resistors and capacitors to build a complete system. Beken Corporation stated that future new products will evolve in sync with the next-generation PSRAM interface standard, demonstrating advantages during the industry cycle of normalized DRAM shortages. Additionally, the BK7259 supports flexible storage configurations from 4MB single PSRAM to 64MB dual PSRAM, allowing a single hardware design to cover different product levels with compatible package pins, eliminating the need for repeated board revisions.
