en.Wedoany.com Reported - Apple Inc. is realigning its Mac chip roadmap around on-device artificial intelligence computing needs, with significant changes to the development and release cadence of the M6, M7, and M8 series. The previously relatively fixed "base chip—Pro—Max—Ultra" product progression will be disrupted, with chip architecture upgrades shifting focus to AI accelerators, unified memory capacity, memory bandwidth, and local model processing capabilities to accommodate the operational demands of large language models and data-intensive tasks on Mac devices.

Under current plans, Apple will only release the entry-level M6 chip, codenamed Komodo, and will no longer continue with the M6 Pro, M6 Max, and M6 Ultra. Instead, high-end Mac processors will move directly to the M7 series. This means an architectural generational split between base and professional versions: standard Mac products will continue using the M6, while high-end models will await the completion of the M7 Pro, M7 Max, and M7 Ultra, altering the traditional approach of covering different performance tiers within the same chip generation.

The entry-level M7 chip, codenamed Delos, is expected to be released in the first half of 2027, with the M7 Pro and M7 Max launching as early as late 2027, and the M7 Ultra planned for 2028. Since Mac products transitioned from Intel processors to Apple's own chips, this marks the first time Apple has skipped the Pro and Max models within the same generation of the mainstream M series, indicating that high-end Mac chips will no longer simply follow the base chip's upgrade cycle but will adopt a more independent development timeline focused on professional computing tasks.

The M6's upgrade focus is primarily on memory bandwidth and graphics processing architecture. Its memory bandwidth is expected to increase to approximately 200 GB/s, a further improvement from the M5's 153 GB/s. It will also feature a redesigned GPU with up to 12 cores, providing higher data transfer capabilities for on-device model inference, image processing, and other parallel computing tasks. Higher bandwidth can reduce data exchange time between the processor, GPU, and unified memory, preventing compute units from frequently waiting during large-scale data reads.

The M7's memory bandwidth is expected to reach approximately 240 GB/s, while the M7 Pro, M7 Max, and M7 Ultra are internally classified under the "Andros" architecture. The high-end series will handle larger-scale professional computing tasks, with the M7 Ultra planned to support up to 1.5 TB of unified memory, roughly double the planned capacity of the M5 Ultra, though final configurations will still be subject to memory market supply conditions.

The increase in unified memory capacity is not just about improving traditional software speed but directly serves the loading and inference of large AI models on local devices. When running large models, the memory must continuously store model parameters, intermediate computation results, and user input data. The larger the model, the higher the demands on capacity and bandwidth; if memory space is insufficient or data exchange speed is limited, even an increase in compute cores may not fully leverage overall performance.

Apple's previously released M5 chip already hinted at this architectural direction. The M5 features a new-generation GPU design, with each GPU core equipped with a neural accelerator, paired with an improved 16-core Neural Engine for AI tasks; the M5 Max supports up to 128 GB of unified memory and 614 GB/s memory bandwidth, optimized for large language models, professional image processing, and high-data-throughput applications.

The M6 and M7 will continue to enhance on-device AI processing capabilities, enabling Macs to run larger models locally and reducing the need for frequent data transmission to the cloud. For applications involving real-time interaction, content generation, model inference, and local data processing, on-device operation can shorten response paths and help mitigate the impact of network conditions on AI functionality.

The M7 Ultra's planning further targets workstation-level AI workloads. Up to 1.5 TB of unified memory can provide greater model loading space for large dataset processing, complex video production, 3D design, and AI research tasks, allowing high-end Macs to handle not only traditional graphics and media production but also professional tasks demanding higher memory capacity, data throughput, and sustained computing power.

This roadmap adjustment also involves coordination among chips, operating systems, and development tools. By designing its own processors, Neural Engine, unified memory architecture, and software frameworks like Core ML, Apple enables AI tasks to be distributed and executed across the CPU, GPU, and dedicated acceleration units, reducing adaptation steps between different hardware and software platforms.

Apple's Neural Engine is a fixed-function matrix accelerator, callable via Core ML, and used for inference in AI tasks such as mixture-of-experts models. Its primary role is not to fully replace the GPU but to offload tasks suitable for matrix operations and neural network processing to dedicated units, thereby forming a combination of power consumption, processing speed, and latency better suited for on-device operation.

The roadmap changes will also directly impact the upgrade cadence of different Mac products. Mainstream users can still wait for products equipped with the M6 chip, while professional users requiring higher unified memory, stronger GPU performance, and more complete AI processing capabilities may need to wait for the M7 Pro, M7 Max, and M7 Ultra to be deployed. In the interim, the M5 Ultra will continue to handle the primary computing tasks for high-end Mac products.

Looking at the overall direction from M6, M7, to M8, AI has transformed from an add-on module in chips to a key foundation for Mac processor architecture adjustments. Memory bandwidth, unified memory capacity, GPU neural acceleration units, and on-device model running capabilities will collectively define the performance boundaries of the next generation of Mac chips, with the R&D focus for high-end products shifting from routine generational upgrades to system-level reconfiguration for large models and professional workloads.