en.Wedoany.com Reported - Cadence and Samsung Foundry have announced a joint effort to develop a portfolio of memory and interface IP products, and to expand the certification of Cadence's digital, custom, 3D IC, and system design and analysis flows on Samsung's second-generation 2nm process, supporting AI infrastructure designs for data centers, edge, and smart device applications.
The two companies had previously completed certification of Cadence tools and IP on multiple Samsung process nodes, including the second-generation 2nm, in 2025. Under a new multi-year agreement, the Cadence portfolio will be expanded to include more memory and interface IP, with additions covering IP supporting the NVLink-C2C interconnect and CUDA-X GPU acceleration libraries, specifically including high-speed SerDes, PCIe, UCIe, and memory interfaces for the second-generation 2nm. The agreement also expands the certified Cadence flows for AI, high-performance computing, and advanced system design.
Cadence and Samsung Foundry stated that they now offer certified flows for the second-generation 2nm, including specific tools: the Cadence Innovus Implementation System for digital implementation, Virtuoso Studio for analog and custom design, the Integrity 3D IC Platform for 3D IC planning and implementation, the Voltus IC Power Integrity Solution for power integrity and system-level power analysis, and the Quantus Extraction Solution and Tempus Timing Solution for signoff. Cadence noted that the flow supports design features of the second-generation 2nm, such as glitch power optimization in the place-and-route flow using the Innovus System and Genus Synthesis Solution, as well as hierarchical flows targeting performance, power, area, and turnaround time goals.
Additionally, support has been provided for Samsung's 3D Cube-H design, offering planning, implementation, and signoff flows for hybrid copper bonding technology, involving tools including the Cadence Cerebrus Intelligent Chip Explorer, Integrity 3D IC, Innovus Implementation System, Voltus IC Power Integrity Solution, and Pegasus Verification System. The flow also includes automatic routing and optimization of silicon interposers, utilizing Tempus and Pegasus for signoff and verification. NVIDIA is leveraging the Cadence and Samsung Foundry platform to advance development on advanced nodes and 3D ICs, supporting NVLink-C2C interconnect and CUDA-X GPU acceleration capabilities for accelerated computing systems and AI semiconductor development.
Ambarella is developing an edge AI platform for the second-generation 2nm to create AI perception and physical AI SoCs for edge systems, which will be applied in robotics, drones, autonomous machines, and sensing. Cadence and Samsung Foundry stated that they will highlight this partnership and design enablement achievements at the Samsung Advanced Foundry Ecosystem 2026 event, which will include a hardware zone and technical sessions and demonstrations focusing on second-generation 2nm and 3D IC design flows for GPU-accelerated AI workloads.
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