China's VeriSilicon NPU Shipments Exceed 250 Million Units, RISC-V Empowers Edge AI and Embodied Robots
2026-07-18 15:00
Favorite

en.Wedoany.com Reported - At the "2026 World Artificial Intelligence Conference RISC-V and Physical Intelligence Forum" held on July 18, Wang Zhiwei, Executive Vice President of VeriSilicon and General Manager of the Custom Chip Platform Business Unit, delivered a speech introducing the application of RISC-V in edge AI and custom chip design for embodied robots.

Wang Zhiwei introduced an overview of VeriSilicon's business. VeriSilicon's IP licensing and custom chip business has steadily improved year by year, boasting a globally leading IP portfolio covering six major processor categories and over 1,700 analog, mixed-signal, and RF IPs, which span nearly all process nodes. VeriSilicon is also the world's second-largest digital IP provider and the fourth-largest full-stack chip customization solution provider.

Regarding the embodied robot chip design platform and the application of RISC-V, Wang Zhiwei pointed out that humanoid robots or embodied robots are system engineering projects involving the brain, cerebellum, and limbs, requiring chips with high performance, low power consumption, and low cost, making them highly suitable for the custom chip market. The current market shows strong demand for NPUs, with VeriSilicon's NPU cumulative global shipments exceeding 250 million units, covering applications from embedded and edge to data centers. Leveraging its self-developed processor IP and analog/mixed-signal IP platform, VeriSilicon has built a system-on-chip (SoC) design platform for high-performance autonomous driving and embodied robots. This platform can integrate third-party IP and incorporates an SoC engineering safety island, having passed ISO functional safety certification.

In terms of edge AI solutions, VeriSilicon's AI computing-related revenue in 2025 accounted for 64% of total revenue. VeriSilicon has developed an AI PAD SoC based on RISC-V, a multimedia chip with low power consumption advantages. Its camera support, video encoding/decoding, and other features align well with application scenarios requiring 10 TOPS to 20 TOPS of computing power, such as smart robotic vacuum cleaners. Consequently, a U.S. customer plans to adopt this chip to enter the robotics field, meeting the needs of products like robotic vacuum cleaners and lawn mowing robots. Wang Zhiwei stated that such SoC solutions do not require the Android system, making them particularly suitable for the RISC-V architecture, combined with NPUs offering certain computing power. Additionally, VeriSilicon's RISC-V-based edge AI chip has been successfully applied in smartphones to enhance photo and video quality.

Wang Zhiwei introduced VeriSilicon's first-generation chip based on the RISC-V AI ISP, which has entered mass production using a 6nm process and has completed delivery of the production software SDK to customers. Targeting the AI/AR glasses and wearable market, a key AIGC entry point, VeriSilicon has developed an ultra-low-power AI/AR glasses SoC platform. Three years ago, VeriSilicon assisted internet company Google in designing AI/AR glasses, achieving ultra-low power consumption with all functions running within SRAM, offering a competitive advantage amid rising storage costs.

This bulletin is compiled and reposted from information of global Internet and strategic partners, aiming to provide communication for readers. If there is any infringement or other issues, please inform us in time. We will make modifications or deletions accordingly. Unauthorized reproduction of this article is strictly prohibited. Email: news@wedoany.com