en.Wedoany.com Reported - US semiconductor company Marvell recently launched the Teralynx T100 switching chip, offering 102.4Tbps switching capacity for AI and cloud data center infrastructure.
The core application scenario for this chip is internal networks within large-scale AI clusters. As the number of GPU and XPU accelerators rapidly increases, the bottleneck in data centers is shifting from the performance of individual computing chips to data exchange efficiency, network latency, power consumption control, and architectural complexity within clusters. Marvell states that the Teralynx T100, built on an advanced 3nm process, is redesigned for AI training and inference workloads, with typical power consumption below 1000W—up to approximately 25% lower than competing solutions—and supports 512-port scaling capabilities. For hyperscale cloud providers and AI infrastructure operators, switching chips may not be the most visible components externally, but they directly determine whether tens of thousands of accelerators can form a stable, efficient, and low-latency computing cluster. Traditional data center switching platforms are primarily designed around enterprise networks, general-purpose cloud computing, and hierarchical architectures. When AI training tasks scale to tens of thousands or hundreds of thousands of cards, network layers, optical interconnect counts, congestion control, tail latency, and power consumption all amplify into systemic costs. The Teralynx T100 aims to reduce switching layers and optical link counts within AI clusters through higher bandwidth, higher port density, and a flatter network structure, enabling data centers to deploy more accelerators under existing power constraints while lowering the pressure of network equipment on rack power, cooling, and total cost of ownership.
Marvell indicated that the Teralynx T100 will begin sampling to customers this quarter, offering multiple packaging options including BGA, co-packaged copper connections, and co-packaged optics.
AI data centers are entering a new phase constrained jointly by "computing power, networking, electricity, and cooling." Over the past few years, the market has focused more on GPU supply, advanced packaging, and HBM memory, but the role of network infrastructure in large-scale training clusters is rapidly rising. If an AI cluster has insufficient network efficiency, expensive accelerators will face issues such as waiting for communication, slower task synchronization, and prolonged training convergence times, ultimately converting hardware procurement costs into utilization losses. Switching chips have thus evolved from traditional data center network components into key semiconductors determining whether AI infrastructure can scale. The Teralynx T100 supports both scale-out and scale-up deployments, is compatible with emerging AI Ethernet architectures and relevant requirements of the Ultra Ethernet Consortium, and integrates telemetry, AI-native congestion control, and low-latency traffic management capabilities. This means that when planning AI clusters, data center operators can design architectures around higher port density, fewer network layers, lower power consumption, and more flexible interconnect forms. As GPU rack power gradually approaches or even exceeds traditional data center design limits, reduced power consumption in network chips is no longer just an optimization of device parameters but will impact the entire data center's power redundancy, liquid cooling ratio, rack density, and expansion pace. For cloud service providers, internet companies, and AI computing operators, improvements in network infrastructure efficiency will directly affect training costs, inference latency, and computing power delivery capabilities.
This launch also indicates that competition in AI infrastructure is extending from single computing chips to underlying components such as switching chips, optical interconnects, SerDes, network operating systems, and cluster scheduling. Subsequent variables focus on customer sampling validation, mass production timelines, compatibility with different AI Ethernet ecosystems, and the actual deployment costs of co-packaged optics solutions in large data centers. If related technologies enter mainstream cloud provider clusters, AI data center networks will become a new focus for investment in advanced semiconductors and cloud infrastructure.
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